00001 /*------------------------------------------------------------------------------- 00002 * Project: KoreBot Library 00003 * $Author: flambercy $ 00004 * $Date: 2006/01/26 14:50:58 $ 00005 * $Revision: 1.2 $ 00006 * 00007 * 00008 * $Header: /home/cvs/libkorebot/src/kb_pxa_register.h,v 1.2 2006/01/26 14:50:58 flambercy Exp $ 00009 */ 00010 00023 #define GPIO_BASE 0x40E00000 00024 00025 #define GPLR 0x40E00000 00026 #define GPLR0 (0x40E00000) /* GPIO Pin Level Register GPIO<31:0> */ 00027 #define GPLR1 (0x40E00004) /* GPIO Pin Level Register GPIO <63:32> */ 00028 #define GPLR2 (0x40E00008) /* GPIO Pin Level Register GPIO <80:64> */ 00029 00030 #define GPDR 0x40E0000C 00031 #define GPDR0 (0x40E0000C) /* GPIO Pin Direction Register GPIO<31:0> */ 00032 #define GPDR1 (0x40E00010) /* GPIO Pin Direction Register GPIO<63:32> */ 00033 #define GPDR2 (0x40E00014) /* GPIO Pin Direction Register GPIO<80:64> */ 00034 00035 #define GPSR 0x40E00018 00036 #define GPSR0 (0x40E00018) /* GPIO Pin Output Set Register GPIO<31:0> */ 00037 #define GPSR1 (0x40E0001C) /* GPIO Pin Output Set Register GPIO<63:32> */ 00038 #define GPSR2 (0x40E00020) /* GPIO Pin Output Set Register GPIO<80:64> */ 00039 00040 #define GPCR 0x40E00024 00041 #define GPCR0 (0x40E00024) /* GPIO Pin Output Clear Register GPIO<31:0> */ 00042 #define GPCR1 (0x40E00028) /* GPIO Pin Output Clear Register GPIO <63:32> */ 00043 #define GPCR2 (0x40E0002C) /* GPIO Pin Output Clear Register GPIO <80:64> */ 00044 00045 #define GRER 0x40E00030 00046 #define GRER0 (0x40E00030) /* GPIO Rising-Edge Detect Register GPIO<31:0> */ 00047 #define GRER1 (0x40E00034) /* GPIO Rising-Edge Detect Register GPIO<63:32> */ 00048 #define GRER2 (0x40E00038) /* GPIO Rising-Edge Detect Register GPIO<80:64> */ 00049 00050 #define GFER 0x40E0003C 00051 #define GFER0 (0x40E0003C) /* GPIO Falling-Edge Detect Register GPIO<31:0> */ 00052 #define GFER1 (0x40E00040) /* GPIO Falling-Edge Detect Register GPIO<63:32> */ 00053 #define GFER2 (0x40E00044) /* GPIO Falling-Edge Detect Register GPIO<80:64> */ 00054 00055 #define GEDR 0x40E00048 00056 #define GEDR0 (0x40E00048) /* GPIO Edge Detect Status Register GPIO<31:0> */ 00057 #define GEDR1 (0x40E0004C) /* GPIO Edge Detect Status Register GPIO<63:32> */ 00058 #define GEDR2 (0x40E00050) /* GPIO Edge Detect Status Register GPIO<80:64> */ 00059 00060 #define GAFR 0x40E00054 00061 #define GAFR0_L (0x40E00054) /* GPIO Alternate Function Select Register GPIO<15:0> */ 00062 #define GAFR0_U (0x40E00058) /* GPIO Alternate Function Select Register GPIO<31:16> */ 00063 #define GAFR1_L (0x40E0005C) /* GPIO Alternate Function Select Register GPIO<47:32> */ 00064 #define GAFR1_U (0x40E00060) /* GPIO Alternate Function Select Register GPIO<63:48> */ 00065 #define GAFR2_L (0x40E00064) /* GPIO Alternate Function Select Register GPIO<79:64> */ 00066 #define GAFR2_U (0x40E00068) /* GPIO Alternate Function Select Register GPIO 80 */ 00067 00068 00069 #define CLK_BASE 0x41300000 00070 00071 #define CKEN 0x41300004 /* Clock enable register */ 00072 00073 #define PWM0_BASE 0x40B00000 00074 00075 #define PWM_CTRL0 0x40B00000 /* PWM0 control register */ 00076 #define PWM_PWDUTY0 0x40B00004 /* PWM0 duty control register */ 00077 #define PWM_PERVAL0 0x40B00008 /* PWM0 Period control register */ 00078 00079 #define PWM1_BASE 0x40C00000 00080 00081 #define PWM_CTRL1 0x40C00000 /* PWM1 control register */ 00082 #define PWM_PWDUTY1 0x40C00004 /* PWM1 duty control register */ 00083 #define PWM_PERVAL1 0x40C00008 /* PWM1 Period control register */
1.5.5